相位 噪声 英语是什么意思 - 英语翻译

• phase noise

在 中文 中使用 相位 噪声 的示例及其翻译为 英语

相位噪声是对LO信号的纯度的一种量度。
Phase noise is a measure of the purity of the LO signal.

动态范围danl相位噪声和扫描速度还触摸屏和跟踪.
Dynamic Range DANI Phase Noise and Sweep Speed Plus Touchscreen and Tracking Generators.

由于相位噪声信息包括在带宽2*fc中，我们可以在很多情况下大幅降低测量噪声。
Since the phase noise information is contained within a bandwidth 2*fc we can drastically limit the measurement noise in many cases.

相位噪声主要取决于所用的固定频率源的噪声，可以做到非常低。
Phase noise depends mainly on the noise of the available fixed-frequency sources and can potentially be very low.

相位噪声在1kHz时优于̵120dBc/Hz，SFDR至少为80dB。
Phase noise is better than̵120 dBc/Hz at 1 kHz, with SFDR of at least 80 dB.

相位噪声低于̵120dBc/Hz，而SFDR》80dB。
Phase noise is below̵120 dBc/Hz while SFDR isgt;80 dB.

在处理速率大于100MHz的信号时，时钟抖动或相位噪声可能成为转换器可用动态范围的一个限制因素。
For processing signals at greater than 100 MHz, clock jitter or phase noise can become a limiting factor in the useable dynamic range of the converter.

相位噪声存在于任何有源元件和无源元件中，但它在振荡器中表现最为严重。
Phase noise is present in every active and resistive component, but it is most severe in oscillators.

由于相位噪声比π/2小很多，因此式4可简化为：.
As the phase noise is always much smaller than π/2, Equation 4 can be approximated as:.

对频率合成器而言，要求之一是快速的频率转换，此外是低相位噪声。
For frequency synthesizers, one of these requirements is fast frequency switching speed; another is low phase noise.

大多数人都明白，输入时钟相位噪声是抖动衰减的，即PLL起着低通滤波器的作用来输入相位噪声。
Most everyone understands that input clock phase noise is jitter attenuated, i.e. the PLL acts like a low pass filter to input phase noise.

抑制这种谐波需要必须足够小的PLL滤波器带宽，而这可能会影响相位噪声和速度性能。
Suppression of the resulting spurs requires that the PLL filter bandwidth must be sufficiently small, which may affect phase noise and speed performance.

为了提高现代无线设备的灵敏度和可选择性，需要尽可能地减小相位噪声和参考杂散，并缩短锁定时间。
To improve sensitivity and selectivity in modern radios, there is a need to minimize phase noise and reference spurs, and to reduce the lock time.

下面（图6）是对高速码型发生器进行相位噪声测量的实例。
In the example below(Fig. 6) the phase noise of a high speed pattern generator is measured.

提到相位噪声性能，综合器设计师主要依靠100MHz恒温晶体振荡器（OCXO）技术。
With respect to phase noise performance, synthesizer designers rely primarily on 100MHz ovenized crystal oscillator(OCXO) technology.

除了相位噪声低以外，8V97051射频合成器16位的频率分辨率，使得它非常适合在精确射频仪器和雷达应用中使用。
In addition to offering low phase noise, the 8V97051 provides 16 bits of frequency resolution that makes it ideal for precise RF instrumentation or radar applications.

用户对这类信号源的要求通常是频率范围宽、频率准确度和稳定度高、频谱纯度高、相位噪声低。
User demand for this type of signal source is usually a wide frequency range, high frequency accuracy and stability, high purity, low phase noise spectrum.

低相位噪声和长寿命。
Low noise and long life.

其相位噪声必须很低，因为信号时序至关重要。
It must have low phase noise where the timing of the signal is critical.

因此，OFDM系统对频偏和相位噪声比较敏感。
OFDM is sensitive to phase and frequency noise.

过滤他们接收到的同步信号以便消除更高频率的相位噪声。
They filter the synchronisation signal they receive to remove the higher frequency phase noise.

这种方案能够提供良好的相位噪声，但增加了复杂些和成本。
This approach provides good phase noise, but with added complexity and cost.

获得良好的阻塞和选择性参数的一个要素是降低RF系统中的相位噪声。
One element of achieving good blocking and selectivity figures is reducing phase noise in the RF system.

然而，为什么一个PLL应该像VCO相位噪声的高通滤波器那样工作并不明显。
However, it is not as readily apparent why a PLL should act like a high pass filter to VCO phase noise.

要解决这一难题，同时又仍然保持很低的相位噪声，需要用到小数N和sigma-delta系统。
To resolve this difficulty while still achieving low phase noise, fractional N and sigma-delta systems are used.

额外的相位噪声余量让设计约束放宽，使得工程人员可以将比特误码率降到最低，同时降低系统总成本。
The additional phase noise margin alleviates system design constraints, allowing engineers to reduce bit error rates(BER) while decreasing overall system costs.

在设计良好的PLL中，相位噪声分布作为载波偏移的函数，包含了两个截然不同的部分。
In a well-designed PLL, the phase-noise profile as a function of offset from the carrier consists of two distinct sections.

接收和发送合成器集成在一起，使他们能够进行自动配置，以实现最佳的相位噪声，调制质量和建立时间。
The receive and transmit synthesizers are integrated, enabling them to be automatically configured to achieve optimum phase noise, modulation quality and settling time.

了解如何利用快而准确的抖动性能测量来验证您的时钟信号（使用R&S®FSWP相位噪声分析仪）.
Learn how to verify your clock signal by taking advantage of fast and precise jitter performance measurements(with R&S®FSWP phase noise analyzer).

新款相位噪声测试仪器覆盖1MHz至50GHz的频率范围，具有直接下变频模拟I/Q混频器以及基带信号采样功能。
A new phase noise test instrument covers the frequency range from 1 MHz to 50 GHz with direct down-conversion analog I/Q mixers and baseband signal sampling.