What is the translation of " 硬件描述语言 " in English?

• hardware description language
• hardware description languages

Examples of using 硬件描述语言 in Chinese and their translations into English

这种语言以Verilog硬件描述语言为基础。
This implementation is translated to the Verilog hardware description language.

硬件描述语言一般是用来描述电气的编程方式。
Hardware description language is generally used to describe the electrical programming.

Verilog和VHDL就是这种硬件描述语言。
Verilog and VHDL are both hardware description languages.

IcarusVerilog是Verilog硬件描述语言的实现工具之一。
Icarus Verilog- Icarus Verilog is an implementation of the Verilog hardware description language.

它是一种硬件描述语言（HDL）。
It is a hardware description language(HDL).

VerilogHDL是一种硬件描述语言（HDL.
Verilog HDL is a Hardware Description Language(HDL).

Verilog和VHDL就是这种硬件描述语言。
Verilog and VHDL are known as Hardware Description Languages.

数字ASIC的设计者通常使用硬件描述语言（HDL）（例如Verilog或VHDL）来描述ASIC的功能。
Designers of digital ASICs use a hardware description language(HDL), such as Verilog or VHDL, to describe the functionality of ASICs.

你可以从不同的硬件描述语言生成代码，包括：VHDL,SystemCandVerilog.
You can generate code in various Hardware Description Languages, including VHDL, SystemC and Verilog.

FPGA配置通常使用硬件描述语言（HDL）来指定，类似于用于专用集成电路（ASIC）的语言。
The FPGA configuration is generally specified using a hardware description language(HDL), similar to that used for an ASIC.

FPGA配置通常使用硬件描述语言（HDL）指定，类似用于专用集成电路（ASIC）的那种。
The FPGA configuration is generally specified using a hardware description language(HDL), similar to that used for an application-specific integrated circuit(ASIC).

今天，我们使用硬件描述语言（Verilog和VHDL）编程，我们也提供功能库，这些是可以提升的。
Today, we program them using hardware description languages(Verilog and VHDL), and we offer libraries of functions.

它们由许多可以使用硬件描述语言(HDL)重新配置的逻辑块组成。
They consist of numerous logic blocks that can be reconfigured using a hardware description language(HDL).

使用分立部件（使用试验电路板）和硬件描述语言（使用FPGA）都设计方法在使用过程中的实验室部分被实现。
Design methodology using both discrete components(using breadboard) and hardware description languages(using FPGA) is implemented in the laboratory portion of the course.

图1：Vidor4000允许用户在Cyclone10上加载、运行和创建IP，而无需使用硬件描述语言。
The Vidor 4000 lets users upload, run, and create IP on a Cyclone 10 without using hardware description languages.

LabVIEWFPGA模块允许该领域专家自定义硬件的特性，而无需具备数字化设计或硬件描述语言方面的专业知识。
The LabVIEW FPGA Module allows domain experts to define custom hardware personalities without having digital design or hardware description language expertise.

本文讨论了硬件描述语言的本质以及HDL语句与实现的硬件之间的关系。
This article discussed a little bit about the nature of hardware description languages and the relationship between the HDL statements and the hardware implemented.

美高森美LiberoSoC设计工具包的内容包括MentorGraphicsModelSimSimulator，可以逐行验证硬件描述语言(HDL)代码。
The Libero SoC tool suite includes the Mentor Graphics ModelSim Simulator, which allows line by line verification of hardware description language(HDL) code.

针对FPGA最常用的语言是Verilog和VHDL，两者均为硬件描述语言（HDL）。
The most popular languages for FPGAs have been Verilog and VHDL, both examples of hardware description languages(HDL).

如果使用硬件描述语言来设计数字集成电路，设计人员通常并不在晶体管级进行设计，而是在更高的抽象级别（层次）进行工程设计。
When designing digital integrated circuits with a hardware description language, the designs are usually engineered at a higher level of abstraction than transistor level(logic families) or logic gate level.

本文介绍了VHDL硬件描述语言基础.
It stands for VHSIC Hardware Description Language.

一个例子就是Bluespec，一种硬件描述语言。
The processor is designed in Bluespec: a functional hardware description language.

VHDL语言是一种主流的硬件描述语言。
Synopsis VHDL is a leading hardware description language.

IcarusVerilog是Verilog硬件描述语言的实现工具之一。
Icarus Verilog is an implementation of the Verilog hardware description language.

常用的方法有硬件描述语言（HDL）和原理图输入方法等。
Commonly used methods are hardware description language(HDL) and schematic input methods.

VHDL和VerilogHDL是世界上最流行的两种硬件描述语言，.
VHDL and Verilog HDL are the two most major Hardware Description Languages.

SDAccel还支持传统硬件设计师用VHDLVerilog等底层硬件描述语言编写优化加速器。
SDAccel also supports traditional hardware designers writing optimized accelerators in lower-level hardware description languages such as VHDL Verilog.

VHDL是一种随着电子技术的不断发展，为满足电路系统化和高度集成化要求而发展起来的一种新型硬件描述语言。
VHDL is a new hardware description language developed with the continuous development of electronic technology to meet the requirements of circuit system and high integration.

Mike经过一番努力后理解了Reed博士的专利，然后实施了一个硬件描述语言（HDL）模拟并成功地印证了Reed博士的最初概念。
Mike worked to gain understanding of Dr. Reed's patents, then implemented a hardware description language(HDL) simulation that successfully proved Dr. Reed's initial concept.

年，一种高级设计语言Verilog由Gateway公司第一次引入并作为硬件描述语言。
In 1986, Verilog, another popular high-level design language, was first introduced as a description language by Gateway Design Automation.