英語 での Logic levels の使用例とその 日本語 への翻訳
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Power supplies and logic levels.
The MAX5078A has CMOS input logic levels while the MAX5078B has TTL-compatible input logic levels.
The MAX25615 has standard TTL input logic levels.
These outputs are CMOS logic levels with relatively high-speed edges.
In digital circuits,“0” and“1” are handled as logic levels.
Both driver in(DIN) and receiver out(ROUT) logic levels are pin programmable through the VL pin.
Digital waveforms can be created as a sequence of times and logic levels.
The MAX14548E translates between VL and VCC logic levels for data rates up to 100Mbps 50MHz.
This flexibility becomes valuable in systems withmultiple supply voltages and/or multiple logic levels.
Design solutions are needed to shift the logic levels for some applications.
To demodulate this waveform, it is a simple matter of passing the signal through two filters andtranslating the resultant back into logic levels.
Switch providing high and low logic levels directly.
The device operates from a +4V to +14V single power supply,typically consuming 0.5mA of supply current and has TTL input logic levels.
Externally applied voltages, VCC and VL, set the logic levels on either side of the device.
Power-supply data-sheet specifications usually detail the dc parameters for remote on/off,listing the on and off logic levels required.
Externally applied voltages, VCC and VL, set the logic levels on either side of the device.
The 3.3 V logic levels mean that the Pi may not work with the many devices and accessories available that require 5 volt logic. .
Two externally applied voltages, VCC and VI, set the logic levels of these devices.
Furthermore, by selecting phases 0 and 1 logic levels for different ports individually, they can be made to blink at opposite phases or not to blink at all.
The device ispowered by two supply voltages that independently define the logic levels of each ground domain.
They can translate between different logic levels(e.g., from LVCMOS to LVDS) to ensure compatibility between the processor video interface and the display module.
Clock inputs CLK+ and CLK-may also be driven with positive referenced ECL(PECL) logic levels if the clock inputs are AC coupled.
The GPIO ports can be programmed to user-defined logic levels, and a GPI coupled with a GPO forms a logic-level translator.
The proper configuration to power the ADC from the reference buffer is shown in Figure 6.VIO can also be supplied if logic levels are compatible.
The MAX15024A and MAX15025A/C accept transistor-to-transistor(TTL) input logic levels while the MAX15024B and MAX15025B/D accept CMOS-input logic levels.
A separate digital power input accepts a wide 1.7V to 3.6Vsupply allowing the MAX19538 to interface with various logic levels.
Typically, the data-decoder is a simple microcontroller running asoftware algorithm that identifies the binary transitions between logic levels to assign a binary"1" or"0" value to the data.
A separate power input for the digital outputs accepts a voltage from1.7V to 3.6V for flexible interfacing with various logic levels.
A separate power-supply input for the digital outputs accepts a 1.7V to3.6V voltage for flexible interfacing with various logic levels.
The MAX16031/MAX16032 offer additional GPIOs that are used for voltage sequencing, additional fault outputs, a manual reset input,or read/write logic levels.