영어에서 Memory array 을 사용하는 예와 한국어로 번역
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Forming a memory array;
Address signals are received and decoded to access memory array 104.
When you release the memory array elements, you must use the appropriate mode, depending on what changes you made.
The researchers demonstrated the technique's ability to rewrite a small 24-bit memory array.
If the flash memory array 215 is available then the next three operations can all occur at approximately the same time.
If there is enough free space to write the data, then the data is written to the free space in the memory array.
Circuits 27 interface with the memory array chip(s) and circuits 29 interface with a host though connections 31.
If head data is to be written,then the system determines whether the flash memory array 215 is ready at 720.
Management tables stored in flash memory array 215 can include a head mapping table 325 and a block linking table.
Memory array 540 can include, for example, MLCs, such as MLCs that can store eight or sixteen program states.
The initial value may be any value related to the head position of the memory array 201, and is generally set equal to 0.
The capacity of the memory array 201 is not restricted to 256 bits but may be varied adequately according to the capacity of data to be stored.
The 3-bit identification data following the write command can thus be written in the first 3 bits of the memory array 201.
Namely the data at the addresses in the memory array 201 that do not require rewiring are overwritten by the same values.
In one embodiment, the head mapping table 325 has only one entry for each valid head data fragment stored in the flash memory array 215.
Typically, in a monolithic three dimensional memory array, one or more memory  device levels are formed above a single substrate.
Also, a memory array may be partitioned into more than one plane, where only one MEU within a plane may be programmed or erased at a time.
The instructions and/or data may be retrieved from the memory array and sequenced and/or buffered before the FUC begins to execute instructions on the data.
A research team led by Professor Robert Wolkow, from the Department of Physics at the University of Alberta in Canada, wanted to develop a more efficient method to rewrite atomic memory arrays.
This transfers the selected row from the memory array to one of 4 or 8(selected by the BA bits) row data buffers, where they can be read by a Read command.
When the ID comparator 203 determines incoincidence of the ID data(that is, in the case of negativeanswer at step S230), the host computer 10 is not allowed to access the memory array 201.
Such a card may includethe entire memory  system, or the controller and memory array, with associated peripheral circuits, may be provided in separate cards.
Memory array 440 can include, for example, single level memory  cells(SLCs) and/or multilevel memory  cells(MLCs) that can store four program states.
The instructions and/or data may be retrieved from the memory array and sequenced and/or buffered before the functional unit circuitry begins to execute instructions on the data.
However, if the flash space was limited, then mechanisms would need to be implemented that allow the head data 305 to be removed from the flash memory array 215 in order to make room for new head data.
The memory arrays can include a number of memory  cells organized into a number of physical blocks, and the physical blocks can be organized into a number of pages.
In this embodiment, the function of the flash controller 220 is not required and the flash memory array 215B does not form part of a logical data storage device, but is used directly as a physical store.
The substrates may be thinned or removed from the memory  levels before bonding, but as the memory  levels are initially formed over separate substrates,such memories  are not true monolithic three-dimensional memory arrays.
In a number of embodiments, memory array 440 may not include any reference memory  cells, e.g., memory array 440 may include only data memory  cells.
Eventually, the mass storage device 150 must, depending upon its error-handling routine, either transfer old head data before accepting new head data orstop using the flash memory array 215 and exclusively use the hard drive 210 for new data fragments.