What is the translation of " CLOCK SOURCE " in Chinese?

• 时钟源

Examples of using Clock source in English and their translations into Chinese

What clock source?
选择什么时钟源?

(TSC) select the TIM clock source.
选择MCLK时钟源。

Clock source needs to be chosen.
于选择时钟源。

Explain how to select the clock source.
于选择时钟源。

The clock source can be selected.
传输时钟源可自选.

STEP 5: Select the clock source.
ClockSource：选择时钟源。

Clock source needs to be chosen.
可选择配置的时钟源.

Select and enable the USB clock source.
选择并使能USB时钟源。

Selects the clock source supplied to Timer 1.
选择供给定时器1的时钟源。

LSI clock is available as CPU clock source.
LSI时钟可以被用作CPU的时钟源。

Internal clock sources and timing characteristics.
内部时钟源和时序特性。

The devices have the two following secondary clock sources:.
该器件支持下列两个外部时钟源：.

PCA clock source bits(CPS2- CPS0) are frozen.
PCA时钟源选择位(CPS2-CPS0)被冻结。

The Timer/Counter is inactive when no clock source is selected.
定时器/计数器处于非活动状态时，没有时钟源被选中。

System clock source of the target device can operate normally.
时，目标器件的系统时钟源可以正常工作。

The C/T0 bit(TMOD.2) selects the counter/timer's clock source.
C/T0位(TMOD.2)选择计数器/定时器的时钟源。

Select the desired PCA clock source(with the CPS2- CPS0 bits).
选择PCA时钟源（用CPS2-0位）。

The Linux kernel can also use HPET as its clock source.
Linux内核也可以使用HPET作为其时钟源（英语：Clocksource）。

Select the desired PCA clock source(with the CPS2- CPS0 bits).
选择所希望的PCA时钟源（用CPS2-CPS0位。

Clock source: internal 128 kHz internal low frequency RC oscillator or external clock..
时钟源：内部128kHz低频RC振荡器或外部时钟。

Deep Standby: 150 nA with real-time clock source and reset manager.
深度待机：150nA，带有实时时钟源和复位管理器.

Activate the PLL, wait for the PLL to lock, and then connect to the PLL as a clock source.
程序必须配置并激活PLL、等待PLL锁定，然后连接到PLL作为时钟源。

During In-System programming the system clock source of the target device can operate normally.
时，目标器件的系统时钟源可以正常工作。

The clock source of TCC can be internal or external clock input(edge selectable from TCC pin).
TCC时钟源可以是内部时钟或者外部时钟（由TCC引.

If Timer/Counter2 is not using the synchronous clock, the clock source is stopped during sleep.
如果定时器/计数器不使用同步时钟，时钟源为睡眠时停止。

Software Standby: 400 nA with retention of core logic and 32 KB SRAM data, real-time clock source, reset manager.
软件待机：400nA，保留核心逻辑和32KBSRAM数据，实时时钟源，复位管理器.

When the device frequencies are greater than 1 MHz, the RC A/D conversion clock source is only recommended for SLEEP operation.
当器件的频率高于1MHz时，仅当在休眠期间进行转换时才推荐使用A/DRC时钟源。

Note: The ADC must be clocked from the PLL or directly from a 14-MHz to 18-MHz clock source to operate properly.
注意:ADC必须使用PLL作为时钟或直接使用16MHz时钟源以便正常工作。

When device frequency is greater than 1 MHz, the RC A/D conversion clock source is recommended for.
当器件的频率高于1MHz时，仅当在休眠期间进行转换时才推荐使用A/DRC时钟源。

The system clock on powerup is the internal clock(16 MHz) and after system initialization another external clock source can be selected in software.
启动时使用的系统时钟是内部时脉（16MHz），在系统起始化后可以透过软体选取外部时脉来源。