Examples of using Gate array in English and their translations into Portuguese
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Confirm the gate array of the barrier.
Among some currently adopted solutions,we can mention the field programmable gate arrays fpgas.
This thing has got gate arrays we have never seen.
Monolithic integrated circuits, digital,obtained by bipolar technology, as gate arrays excl.
But the example of the gate arrays shows how the system has also changed.
Several levees of abstraction have been developed.the fpga(field-programmable gate array) quartus ii¿tool an.
FPGA is the acronym for Field Programmable Gate Array-something like"Programmable Ports arrangement in field.
Two devices were developed: a microprocessor-based hardware anda fpga(field programmable gate array) soc system on a chip.
The technology uses FPGA(Field Programmable Gate Array) to convert any signal into the DSD sound format….
This work presents a study on the implementation of matrix operators for the numerical solution of linear systems on fpgas field programmable gate arrays.
MOS or bipolar, as gate arrays excl.
This work consists in a study about the radiation effects in programmable circuits and system-on-chips(socs)based on fpgas field-programmable gate arrays.
The initial ASICs used gate array technology.
To get the high data rates and the low latency requiredby real time processing, a parameterized circuit based on field programmable gate array¿fpga was proposed.
Depending on the physical technology(FPGA,ASIC gate array, ASIC standard cell), HDLs may or may not play a significant role in the back-end flow.
Searching for reconfigurable devices, computer scientists andengineers used field programmable gate arrays(fpgas) as prototypes for snns.
The use of technology based on field programmable gate arrays(fpgas), a reconfigurable technology, has become a frequent object of study.
This study presents an implementation purpose of a protection system for research nuclear reactors by using a programed device fpga field programmable gate array.
One of the most viable solutions comes in the form of Field Programmable Gate Arrays(FPGAs), originally designed for developing new hardware.
Field programmable gate arrays(fpgas) are reconfigurable hardware components that have found great commercial success over the past years in a wide variety of application niches.
All the techniques are explored in order to be implemented in fpga(field programmable gate array) devices, having some advantages over microcontrollers and dsp¿s digital signa.
This dissertation presents the implementation of a system of detection and compression of electrical disturbances(sdcde),focusing on implementations based on fpga platform field-programmable gate array.
Additionally, a customized digital hardware architecture explored the parallelism of the fpgas(field programmable gate arrays), optimizing the use of hardware resources and memory bandwidth.
CPU implementations that consisted of multiple ECL gate array or macrocell array chips included the VAX 8600 and 8800 superminis and finally the VAX 9000 mainframe class machines.
Beyond these physical devices,several companies also offer MCS-51 derivatives as IP cores for use in field-programmable gate array(FPGA) or application-specific integrated circuit(ASIC) designs.
The flexibility introduced by the use of fpgas(field programmable gate array) commercial sram in embedded applications, makes this technology becomes an attractive alternative for military and space applications.
Through collaborative research with Stanford University, we have developed a powerful new genomics algorithm that runs on an Intel Altera field-programmable gate array(FPGA) infrastructure within Microsoft Azure.
The objective of this project was therefore to develop an embedded field-programmable gate array(fpga) platform for the real-time simulation of dynamic systems. fpgas are flexible reconfigurable hardware platforms that may be altered or programmed in run time.
The performance results show that the proposed technique outperforms previous techniques in terms of mean square error¿eb/n0, acceptance ratio in percentage, and bit error rate when the plc channels are indoor and outdoor, corrupted by the presence of additive white gaussian noise(awgn) and additive impulsive gaussian noise(aign), andhardware resource utilization when it is implemented in a field programmable gate array.
This work is a case study of an industrial plant emulator implemented in fpga(field programmable gate array), to simulate systems together with a plc programmable logic controller.