Examples of using Instruction set in English and their translations into Russian
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Official
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Colloquial
Compatible with x64 instruction set.
Reduced instruction set computers.
This ARM11 processor has the following CPU Instruction Set: ARMv6.
AVX/FMA instruction set support for future CPUs.
RDRAND is available in Ivy Bridge processors andis part of the Intel 64 and IA-32 instruction set architectures.
Intel releases the instruction set for the IA-64 architecture.
Open Firmware Forth Code may be compiled into FCode,a bytecode which is independent of computer architecture details such as the instruction set and memory hierarchy.
CompactRISC is a family of instruction set architectures from National Semiconductor.
The PDP-10's architecture is almost identical to that of DEC's earlier PDP-6,sharing the same 36-bit word length and slightly extending the instruction set but with improved hardware implementation.
The instruction set is very simple; there are 27 instructions in three families.
A year ago Intel announced AVX-512 instruction set that expands a vector register to 512 bits.
The MMIX instruction set architecture is supported by a number of software tools for computer architecture research and software development.
While they added an on-chip L1 cache and the 486 instruction set, performance-wise, they were somewhere between the 386 and the 486.
The instruction set and register complement were highly orthogonal, making the 6809 easier to program than the 6800 or 6502.
It thus included such elements as an instruction set, main memory, interrupts, exceptions, and device access.
The PAT method creates a partition type table at a specific address mapped inside the register andutilizes the memory architecture and instruction set more efficiently and faster.
The R600 family Instruction Set Architecture guide was released on June 11, 2008.
UNCOL was intended to make compilers economically available for each new instruction set architecture and programming language.
It extended the MMX instruction set with 12 new instructions useful in multimedia applications.
BiiN CPU Architecture Reference Manual(describes i960MX instruction set) BiiN documentation at bitsavers. org.
The MMIX instruction set comprises 256 opcodes, one of which is reserved for future expansion.
It includes support for Intel Prescott processor(and its special features like IA SSE3 instruction set and Thermal Monitor 2), ATI Radeon 9100 video chipset, and a full translation to Swedish language.
The instruction set issues related to the process of repair of the aircraft, including those relating to the amount and quality of work performed on replacement units, parts and assemblies.
The 3000 series adds an SSE4 instruction set, which was first introduced with Intel Core i7.
While it is possible to manually configure and compile your own software,OpenWrt's build system automates this process to work on the instruction set architecture of most embedded systems.
You can change the instruction set on your images as many times as you like without ever disturbing the original RAW data.
High peak performance- over 47 TFLOPS per rack based on Intel x86 architecture with AVX Instruction set and up to 200 TFLOPS with the use of Intel Xeon Phi coprocessors;
Almost every modern processor instruction set includes an instruction or sleep mode which halts the processor until more work needs to be done.
Perhaps the project where his innovations were most noted was in the IBM 801 minicomputer,where his realization that matching the design of the architecture's instruction set to the relatively simple instructions actually emitted by compilers could allow high performance at a low cost.
Microprogramming allows the base instruction set to be defined or extended by built-in programs now called firmware or microcode.